PFC Circuit Design and Layout for Power Systems

| Created: September 7, 2020 | Updated: September 25, 2020

PFC Circuit Design and Layout for Power Systems

Much as we would like, the power input into a PCB is not always a clean DC or sinusoidal signal. DC coming from a rectifier will have some ripple from the output capacitor, and AC signals can contain noise or be less-than-perfect sine waves. There are some ways to correct these problems, either by choosing the right filtration circuit or by shaping the input wave to produce maximum power output to a load in the system.

If you’re working with an AC power system, you’ll likely need power factor correction (PFC) to either reduce your current/power draw at the power supply, or to increase the available power to the load. While PFC circuits are available as ICs, they can’t handle the demands of higher voltage/higher current systems. You’ll need your own PFC circuit design and layout on the PCB to increase your power factor near 1. Here’s how you can design and simulate your own PFC circuit, and we’ll give you some layout tips for your PFC circuit.

What is Power Factor Correction?

The power factor of a power supply is the ratio of the real power consumed to the apparent power (in RMS volts and amps), and this number ranges from 0 to 1. A typical switching regulator in a power supply circuit connected to an AC source with a rectifier will draw current in small bursts once the input voltage nears its peak. The more the current drawn from the input line deviates from the sinusoidal voltage waveform, the smaller the power factor will be. The power factor is basically another metric for power efficiency.

As an example, suppose a regulator is 96% efficient; if the overall power supply has a power factor of 60%, then the real efficiency is 96% x 60% = 57.6%. The goal of using a PFC circuit design is to bring the power factor as close to 1 as possible. When the power factor is closer to 1, the real power consumed will become closer to the apparent power you would calculate using the ideal RMS input voltage and current.

If you’re planning to sell your new product in Europe, you’ll need to make sure you apply PFC in your power supply. The most important regulation is EN61000-3-2, which applies to power systems with at least 75 W input power and pull up to 16 A at the service entrance. This regulation also sets limits on total harmonic distortion (THD) up to the 39th harmonic as measured at the input of a regulator. This illustrates the other benefit of a PFC circuit; a power supply with a larger power factor will have THD near zero at the DC regulator input.

Power supply flowchart in PFC circuit design — *Block diagram showing how power is transferred in a power supply. The red curves in the center graph represent spikes of current draw from the downstream DC switching regulator.*

PFC Circuit Design and Topology

A PFC converter can be implemented with boost or buck topology. There is also a buck-boost topology, although this is not as popular as the input voltage normally needs to be stepped up or down and regulated at a constant level. The two buck and boost versions are shown below. If these circuit diagrams match what you’d expect from a standard buck or boost DC-DC converter, then you’re correct! The overall circuit diagrams are identical, but the component selection for these circuits influences the power factor increase provided by the circuit.

*PFC circuit design with boost and buck topology.*

So what makes a PFC circuit different from a typical switching regulator? The critical point in PFC circuit design is choosing the right running mode, which involves selecting the right inductor in this circuit. The inductor will determine how fast the current through the inductor increases as the input voltage rises while the MOSFET is on. Once the MOSFET is switched off, the inductor provides a back EMF, which then directs more current towards the load.

The inductor ripple waveform is determined by the size of the inductor, just as is the case in a typical switching regulator. The ripple wave will be larger when the inductor is smaller. Control over the waveform is maintained applying a PWM or PFM pulse to the MOSFET. The three PFC circuit modes shown below are determined by the inductor size and the type of modulation applied to the MOSFET. The table below summarizes the modulation and current characteristics in each mode.

PFC circuit design modes — *PFC circuit modes. Blue: inductor current; Red: average current.*

Mode	Modulation	Current Characteristics
CCM	PWM	Average current closer to ideal sinusoidal current with low ripple, use a high-speed SiC Schottky diode to increase efficiency. Best for highest power output.
CrCM	PFM	Lower average current compared to ideal current, higher ripple, lower switching losses as MOSFET is cycled closer to true OFF state. Best for moderate power output.
DCM	PWM or PFM	Lowest average current compared to ideal current, highest ripple, least switching losses as MOSFET can be cycled completely off. Best for low power output, worst in terms of EMI.

To properly provide PWM or PFM to the switching MOSFET, you need to implement a feedback loop to a PWM/PFM controller. There are some specialty ICs that can be used for this purpose, even at high voltages.

PFC Layout: Treat it Like a High Power Switching Regulator

Perhaps the most important point to remember when working with any switching converter is to consider isolation from switching noise. Any noise from a noisy switching regulator or PFC circuit, especially at high current, will generate strong magnetic fields that can induce a noise signal in a downstream circuit. Note that galvanic isolation removes conducted EMI, but not radiated EMI, so you’ll need to prevent any induced noise with an isolation structure for low-level circuits, such as a via fence or shielding. This has long been a well-known problem in power supply design, both for high voltage supplies and regulator ICs in low power electronics.

Other points to consider are designing the PWM signal or PFM signal, your stackup design, and other techniques to reduce radiated EMI. When you’re working at high voltages, you’ll also need to be sure you set the appropriate spacing between conductive elements in your PCB layout to prevent ESD. These clearances are defined in the IPC-2221 standards. Take a look at these articles to learn more:

When you’re ready to create your PFC circuit design and layout on a PCB, you can use the schematic design and PCB layout features in Altium Designer®. You’ll have everything you need to quickly layout your PFC circuit and regulators for use in high voltage designs. You can also access the PDN Analyzer tool, which allows you to examine voltage distribution throughout your power delivery network.

Now you can download a free trial of Altium Designer and learn more about the industry’s best layout, simulation, and production planning tools. Talk to an Altium expert today to learn more.

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About Author

Zachariah Peterson has an extensive technical background in academia and industry. He currently provides research, design, and marketing services to companies in the electronics industry. Prior to working in the PCB industry, he taught at Portland State University and conducted research on random laser theory, materials, and stability. His background in scientific research spans topics in nanoparticle lasers, electronic and optoelectronic semiconductor devices, environmental sensors, and stochastics. His work has been published in over a dozen peer-reviewed journals and conference proceedings, and he has written 1000+ technical blogs on PCB design for a number of companies. He is a member of IEEE Photonics Society, IEEE Electronics Packaging Society, and the American Physical Society, and he currently serves on the INCITS Quantum Computing Technical Advisory Committee.